Relevance for UPSC: GS III (Industry, Science & Technology); Source: PIB

Context

To reduce dependence on imported semiconductor technology and move up the value chain, the Government of India has launched the Design Linked Incentive Scheme under the Semicon India Programme. The scheme recognises that chip design is the highest value-added segment of the semiconductor ecosystem and is critical for technological sovereignty.

What the Scheme Aims to Do

• Build a domestic chip design ecosystem across integrated circuits, systems-on-chip, chipsets and semiconductor intellectual property cores.
• Encourage a fabless design model, which requires lower capital than fabrication but yields high strategic and economic returns.
• Support startups, Micro, Small and Medium Enterprises, and Indian-owned companies from design to commercial deployment.

Key Features

• Design-stage support: Up to 50 percent reimbursement of eligible expenditure, capped at ₹15 crore per project.
• Deployment-stage support: 4–6 percent incentive on net sales for five years, capped at ₹30 crore per project.
• Access to advanced design tools, shared intellectual property libraries, prototype fabrication and testing support.

Why It Matters

• Chip design accounts for nearly 50 percent of value addition in semiconductors.
• Enhances technological sovereignty, supply-chain resilience and defence preparedness.
• Generates high-skilled employment and strengthens India’s position in global electronics and artificial intelligence markets.

Q. Consider the following statements about the Design Linked Incentive Scheme:

1. It provides financial incentives for both chip design and commercial deployment.
2. It is implemented by the Ministry of Commerce and Industry.

Which of the statements given above is/are correct?
(a) 1 only
(b) 2 only
(c) Both 1 and 2
(d) Neither 1 nor 2